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Re: gEDA-user: How to make a mask similar to soldermask (not containing any via circles)



On Thu, 2011-02-10 at 10:44 -0500, DJ Delorie wrote:
> > I want to define a zone for gold plating.  If I put a polygon on a layer
> > it makes the layer included in all the vias.
> > 
> > How do I make it not create via circles on this extra layer I defined?
> 
> The only solution for these types of question is: hack pcb.  Sorry.

I'm not sure if the code would ignore the vias if you put the polygon on
an "outline" or "route" layer. If not, it wouldn't be a problem to hack
that functionality up quickly.

Give me a shout if you need a hand. I might be able to help.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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