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Re: gEDA-user: PCB: DRC does not correctly check pad clearance
On 2/19/11, Kai-Martin Knaak <kmk@xxxxxxxxxxxx> wrote:
> I can confirm for fairly recent versions of pcb and pcb+gl.
> In your example, DRC starts to complain at 7.1 mil. That is, 2 mil
> too late. The discrepancy grows as the clearance grows. With an
> 11 mil gap I had to ask for 14.1 mil minimum distance to receive
> DRC errors.
It looks like Bloat in IsLineInPolygon() should be doubled like in the
attachment.
diff --git a/src/find.c b/src/find.c
index 615659d..a819b4a 100644
--- a/src/find.c
+++ b/src/find.c
@@ -2670,7 +2670,7 @@ IsLineInPolygon (LineTypePtr Line, PolygonTypePtr Polygon)
return false;
if (TEST_FLAG(SQUAREFLAG,Line)&&(Line->Point1.X==Line->Point2.X||Line->Point1.Y==Line->Point2.Y))
{
- BDimension wid = (Line->Thickness + Bloat + 1) / 2;
+ BDimension wid = (Line->Thickness + 1) / 2 + Bloat;
LocationType x1, x2, y1, y2;
x1 = MIN (Line->Point1.X, Line->Point2.X) - wid;
@@ -2684,7 +2684,7 @@ IsLineInPolygon (LineTypePtr Line, PolygonTypePtr Polygon)
&& Box->Y1 <= Polygon->Clipped->contours->ymax + Bloat
&& Box->Y2 >= Polygon->Clipped->contours->ymin - Bloat)
{
- if (!(lp = LinePoly (Line, Line->Thickness + Bloat)))
+ if (!(lp = LinePoly (Line, Line->Thickness + Bloat * 2)))
return FALSE; /* error */
return isects (lp, Polygon, true);
}
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