gEDA-user: can seem to get rid of drc errors

[Marc <mark.price13@xxxxxxxxxxxx>]

here is the schematic

Marc :)
v 20050820 1
C 52400 67900 1 90 0 lm741-2.sym
{
T 50930 69014 5 10 1 1 90 0 1
refdes=U2
T 51100 68700 5 10 1 1 0 0 1
value=9v
}
N 52300 67900 52300 67600 4
N 52600 71000 53000 71000 4
N 53000 71000 53000 71200 4
N 51000 71000 50000 71000 4
{
T 50000 71000 5 10 1 1 0 0 1
netname=mytracks
}
C 53900 70300 1 90 0 resistor-variable-2.sym
{
T 53500 70850 5 10 1 1 90 0 1
refdes=R1
T 53900 70300 5 10 1 1 0 0 1
value=10K
}
N 53000 71200 54200 71200 4
{
T 53000 71300 5 10 1 1 0 0 1
netname=mytracks
}
N 53800 70300 53800 67600 4
N 50000 67600 54200 67600 4
{
T 50500 67500 5 10 1 1 0 0 1
netname=mytracks
}
N 53300 70800 53300 68300 4
{
T 52900 69900 5 10 1 1 0 0 1
netname=mytracks
}
N 53300 68300 52100 68300 4
N 52100 68300 52100 67900 4
N 52100 67900 51900 67900 4
N 51700 67900 51500 67900 4
N 51100 67900 50900 67900 4
{
T 51100 67900 5 10 0 0 0 0 1
netname=mytracks
}
N 51100 69500 50800 69500 4
{
T 51100 69500 5 10 0 0 0 0 1
netname=mytracks
}
N 52300 69500 52600 69500 4
{
T 52300 69500 5 10 0 0 0 0 1
netname=mytracks
}
C 49800 69800 1 270 0 voltage-3.sym
{
T 50300 69500 5 10 1 1 270 0 1
refdes=V1
T 49800 69800 5 10 1 1 0 0 1
value=9v
}
N 50000 71000 50000 69800 4
N 50000 67600 50000 68900 4
N 51900 69500 51900 70400 4
C 50200 70800 1 270 0 capacitor-2.sym
{
T 50700 70600 5 10 1 1 270 0 1
refdes=C1
T 51100 70600 5 10 0 0 270 0 1
symversion=0.1
T 50200 70200 5 10 1 1 0 0 1
value=0.33uf
}
N 50400 69900 50400 67600 4
C 53800 68500 1 270 0 capacitor-2.sym
{
T 54300 68300 5 10 1 1 270 0 1
refdes=C2
T 54700 68300 5 10 0 0 270 0 1
symversion=0.1
T 53800 68500 5 10 1 1 0 0 1
value=0.1uf
}
N 54000 71200 54000 68500 4
N 50400 71000 50400 71200 4
N 50400 71200 51500 71200 4
N 51500 69500 51500 71200 4
N 51800 70400 51900 70400 4
C 51800 67300 1 0 0 gnd-1.sym
C 52700 69300 1 270 0 resistor-2.sym
{
T 53000 69100 5 10 1 1 270 0 1
refdes=R2
T 52700 69300 5 10 1 1 0 0 1
value=0
}
N 51700 67900 51700 68400 4
N 51700 68400 52800 68400 4
N 52800 69300 52800 69800 4
N 52800 69800 51900 69800 4
{
T 51900 69800 5 10 1 1 0 0 1
netname=mytracks
}
N 50400 71000 50400 70800 4
C 51000 70400 1 0 0 lm7818-1.sym
{
T 52400 71400 5 10 1 1 0 6 1
refdes=U1
T 51600 71400 5 10 1 1 0 0 1
value=18V
}

v 20050820 1
T 400 600 9 8 1 0 0 0 1
IN
T 948 600 9 8 1 0 0 0 1
OUT
T 900 100 9 8 1 0 0 0 1
7818
B 300 300 1000 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 1600 1300 5 10 0 0 0 0 1
device=7818
T 656 401 9 8 1 0 0 0 1
GND
P 300 600 0 600 1 0 1
{
T 100 650 5 8 1 1 0 0 1
pinnumber=1
T 100 650 5 8 0 0 0 0 1
pinseq=1
T 300 600 5 10 0 0 0 0 1
pintype=pwr
}
P 800 0 800 300 1 0 0
{
T 700 100 5 8 1 1 0 0 1
pinnumber=2
T 700 100 5 8 0 0 0 0 1
pinseq=2
T 800 0 5 10 0 1 0 0 1
pintype=pwr
}
P 1300 600 1600 600 1 0 1
{
T 1430 650 5 8 1 1 0 0 1
pinnumber=3
T 1430 650 5 8 0 0 0 0 1
pinseq=3
T 1300 600 5 10 0 1 0 0 1
pintype=pwr
}
T 1400 1000 8 10 1 1 0 6 1
refdes=U?
T 1600 1100 5 10 0 0 0 0 1
pins=3
T 1600 900 5 10 0 0 0 0 1
net=GND:2

v 20050820 1
T 25 1550 8 8 0 0 0 0 1
device=LM741
T 338 1414 9 8 1 0 0 0 1
LM741
T 1114 1470 8 10 1 1 0 0 1
refdes=U?
P 300 500 0 500 1 0 1
{
T 167 606 5 8 1 1 0 0 1
pinnumber=3
T 50 519 5 8 0 0 0 0 1
pinseq=3
T 200 494 5 10 0 0 0 0 1
pinlabel=3
T 200 494 5 10 0 0 0 0 1
pintype=in
}
P 300 100 0 100 1 0 1
{
T 150 69 5 8 0 0 270 0 1
pinseq=4
T 300 94 5 10 0 0 270 0 1
pinlabel=4
T 300 94 5 10 0 0 270 0 1
pintype=pwr
T 139 208 5 10 1 1 0 0 1
pinnumber=4
}
P 1300 500 1600 500 1 0 1
{
T 1384 619 5 8 1 1 0 0 1
pinnumber=6
T 1375 519 5 8 0 0 0 0 1
pinseq=6
T 1300 494 5 10 0 0 0 0 1
pinlabel=6
T 1300 494 5 10 0 0 0 0 1
pintype=out
}
P 1300 900 1600 900 1 0 1
{
T 1375 844 5 8 0 0 270 0 1
pinseq=7
T 1300 894 5 10 0 0 270 0 1
pintype=pwr
T 1381 1007 5 10 1 1 0 0 1
pinlabel=7
T 1300 894 5 10 0 0 0 0 1
pinnumber=7
}
L 300 1400 300 0 3 0 0 0 -1 -1
L 1300 1400 300 1400 3 0 0 0 -1 -1
L 1300 0 300 0 3 0 0 0 -1 -1
P 1300 100 1600 100 1 0 1
{
T 1395 222 5 8 1 1 0 0 1
pinnumber=5
T 1375 119 5 8 0 0 0 0 1
pinseq=5
T 1300 94 5 10 0 0 0 0 1
pinlabel=5
T 1300 94 5 10 0 0 0 0 1
pintype=pas
}
P 300 1300 0 1300 1 0 1
{
T 226 1247 5 8 0 0 270 2 1
pinseq=1
T 301 1297 5 10 0 0 270 2 1
pintype=pas
T 249 1402 5 10 1 1 0 6 1
pinlabel=1
T 301 1297 5 10 0 0 0 0 1
pinnumber=1
}
P 1300 1300 1600 1300 1 0 1
{
T 1383 1419 5 8 1 1 0 0 1
pinnumber=8
T 1575 1319 5 8 0 0 0 0 1
pinseq=8
T 1500 1294 5 10 0 0 0 0 1
pinlabel=8
T 1500 1294 5 10 0 0 0 0 1
pintype=pas
}
L 1300 1400 1300 0 3 0 0 0 -1 -1
T 417 386 9 6 1 0 0 0 1
in +
T 963 878 9 6 1 0 0 0 1
Vcc
P 300 900 0 900 1 0 1
{
T 169 1013 5 8 1 1 0 0 1
pinnumber=2
T 152 926 5 8 0 0 0 0 1
pinseq=2
T 302 901 5 10 0 0 0 0 1
pinlabel=2
T 302 901 5 10 0 0 0 0 1
pintype=in
}
T 416 869 9 6 1 0 0 0 1
in -
T 419 1090 9 6 1 0 0 0 2
offset 

T 421 1159 9 6 1 0 0 0 1
null
T 897 24 9 6 1 0 0 0 1
null
T 895 -45 9 6 1 0 0 0 2
offset 

T 1083 1287 9 6 1 0 0 0 1
nc
T 884 463 9 6 1 0 0 0 1
output
T 423 80 9 6 1 0 0 0 1
Vee
T 1300 1900 8 10 0 0 180 0 1
footprint=DIP8
T 300 2000 8 10 0 0 0 0 1
numslots=0