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Re: gEDA-user: Test pads in PCB



On Mon, 16 Jan 2006 07:34:51 -0500 (EST)
sdb@xxxxxxxxxx (Stuart Brorson) wrote:

> Any thoughts?  Has anybody tried to place testpads for manufacturing
> test?  

No, I haven't but if such feature were implemented, the "clear a polygon in a
soldermask" problem would be solved too.

Maybe a flag should indicate that "don't check this component against
connectivity, just against short circuit". Just an idea.

Levente

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