[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: gEDA-user: Cannot route pins from QFN



Try disabling "auto enforce DRC" clearance.  Also, your design
clearances might be too big to even let traces get to those pads.  See
File->Preferences->Sizes.

And check the silly stuff too.  Make sure you're on the right layer ;-)