gEDA-user: via in pad

[ldoolitt@xxxxxxxxxxxxxxx]

Friends -

In PCB, I put down an exposed-paddle part (like the CY7C68013A-56LFXC),
and then put vias in the central region as recommended for both thermal
transfer and electrical connection.  Just like the rest of the pad,
those vias are clear of solder mask.

According to the manufacturer's sheet, however, those vias should get
covered by mask, to keep solder from wicking down the via during reflow.
There is a nice picture of that near the end of the Cypress data sheet
for the CY7C68013A.

Has anyone found (or put in) a method to accomplish this in PCB?  The
Gerber file for the mask layer (negative) would need a paint/scratch
sequence to get the pad exposed, and then the via covered.

   - Larry


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