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gEDA-user: PCB + Loadint Net
I am a newbie w/ PCB.
I created a schematic with gschem. Gnetlist -g drc2 reports a couple
mis-matched pins, passive connected to input, etc. Gnetlist -g geda
produces a correct looking listing.
gsch2pcb reports no errors. The resulting .net looks OK.
Pcb only complained of no font information, and reports using the
default font. All the footprints are stacked in the upper left
corner.
file->load netlist file
select the file and press open
No error messages.
Connects->optimize rats nest produces an error,
'Can't add rat lines because no netlist is loaded.'
What am I doing wrong? I have attached details...
tomdean
===== gsch2pcb -v -v my-file.sch ===================================
Running command:
gnetlist -g PCB -o my-file.net my-file.sch
--------
gEDA/gnetlist version 20060123
gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details.
This is free software, and you are welcome to redistribute it under certain
conditions; please see the COPYING file for more details.
Remember to check that your schematic has no errors using the drc2 backend.
You can do it running 'gnetlist -g drc2 your_schematic.sch -o drc_output.txt'
and seeing the contents of the file drc_output.txt.
Loading schematic [/usr/home/tomdean/cad/verilog/work/my-file.sch]
Default m4-pcbdir: /usr/local/share/pcb/m4
--------
gnet-gsch2pcb-tmp.scm override file:
(define m4-pcbdir "/usr/local/share/pcb/m4")
--------
Running command:
gnetlist -g gsch2pcb -o my-file.pcb -m gnet-gsch2pcb-tmp.scm my-file.sch
--------
gEDA/gnetlist version 20060123
gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details.
This is free software, and you are welcome to redistribute it under certain
conditions; please see the COPYING file for more details.
Remember to check that your schematic has no errors using the drc2 backend.
You can do it running 'gnetlist -g drc2 your_schematic.sch -o drc_output.txt'
and seeing the contents of the file drc_output.txt.
Loading schematic [/usr/home/tomdean/cad/verilog/work/my-file.sch]
--------
WARNING: P1 has no footprint attribute so won't be in the layout.
WARNING: R1 has no footprint attribute so won't be in the layout.
U9: added new m4 element for footprint DIP14 (value=unknown)
----
WARNING: CONN2 has no footprint attribute so won't be in the layout.
U8: added new m4 element for footprint DIP14 (value=unknown)
----
WARNING: CONN1 has no footprint attribute so won't be in the layout.
U7: added new m4 element for footprint DIP14 (value=unknown)
----
U6: added new m4 element for footprint DIP16 (value=unknown)
----
U10: added new m4 element for footprint DIP14 (value=unknown)
----
U5: added new m4 element for footprint DIP16 (value=unknown)
----
U4: added new m4 element for footprint DIP16 (value=unknown)
----
U3: added new m4 element for footprint DIP16 (value=unknown)
----
U2: added new m4 element for footprint DIP8 (value=unknown)
----
WARNING: P2 has no footprint attribute so won't be in the layout.
U1: added new m4 element for footprint DIP14 (value=unknown)
----
----------------------------------
Done processing. Work performed:
0 file elements and 10 m4 elements added to my-file.pcb.
5 components had no footprint attribute and are omitted.
Next step:
Run pcb on your file my-file.pcb.
You will find all your footprints in a bundle ready for you to place.
=== more my-file.net ===========================================
in_sel U10-3 U9-2
Input U10-2 P1-1
DEBUGbar U10-1 U8-3
Calibrate CONN2-5 U8-1 U8-2 U7-2
dbg_input U9-3 U7-3
RCOut P2-1 U6-9
OE3 CONN2-4 U6-14
cpc3 U6-11 U5-9
OE2 CONN2-3 U5-14
cpc2 U5-11 U4-9
OE1 CONN2-2 U4-14
cpc1 U4-11 U3-9
cpc0 U9-1 U3-11
Latch U6-13 U5-13 U4-13 CONN2-6 U3-13
OE0 CONN2-1 U3-14
Reset U6-10 U5-10 U4-10 CONN2-7 U3-10
D[6] U6-6 U5-6 U4-6 U3-6 CONN1-7
D[4] U6-4 U5-4 U4-4 U3-4 CONN1-5
D[2] U6-2 U5-2 U4-2 U3-2 CONN1-3
D[0] U6-15 U5-15 U4-15 U3-15 CONN1-1
D[7] U6-7 U5-7 U4-7 U3-7 CONN1-8
D[5] U6-5 U5-5 U4-5 U3-5 CONN1-6
D[3] U6-3 U5-3 U4-3 U3-3 CONN1-4
D[1] U6-1 U5-1 U4-1 U3-1 CONN1-2
GND U2-4 U10-7 U9-7 CONN2-9 U8-7 U7-7 U6-8 U5-8 U4-8 U3-8 U1-7
Vcc R1-1 U2-8 U10-14 U9-14 CONN2-10 U8-14 U7-14 U6-16 U5-16 U4-16 U3-16 U1-1
4
pu2 R1-3 U1-4
pu1 R1-2 U1-1
ce U6-12 U5-12 U4-12 U3-12 U1-5
Count CONN2-8 U1-2
clk U7-1 U2-5 U1-3
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