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gEDA-user: Mechanical/Documentation layer in PCB

Hi,


Is there any way to exclude layers in PCB from being checked against DRC and
electrical connections? Like the the silk layer. It would be good to draw
mechanical areas, temporary lines, etc. The bad thing is that when a new layer
is created, and when I place a line over some components, it shorts
everything.

Thanks,

-- 
Levente Kovacs
http://logonex.eu



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