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gEDA-user: PCB: Power Plane Around Traces
- To: geda-user@xxxxxxxx
- Subject: gEDA-user: PCB: Power Plane Around Traces
- From: Neal Baer <nbaer@xxxxxxxxxxxxxx>
- Date: Thu, 23 Jun 2005 17:48:43 -0500
- Delivered-to: archiver@seul.org
- Delivered-to: geda-user-outgoing@seul.org
- Delivered-to: geda-user@seul.org
- Delivery-date: Thu, 23 Jun 2005 18:51:35 -0400
- Organization: BaerTronix
- Reply-to: geda-user@xxxxxxxx
- Sender: owner-geda-user@xxxxxxxx
- User-agent: Mozilla Thunderbird 1.0 (X11/20041206)
As I understand it, the rectangle or polygon commands will automatically
create a keep out area around a via or a pin.
Is it possible to create a power plane on the component side (or any
signal layer) that will automatically create a keep out area around the
traces, so the traces will not short to the plane?
Thanks,
Neal Baer