[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: gEDA-user: Implicit or Explicit Power Pins




On Jun 5, 2006, at 5:28 AM, Stuart Brorson wrote:

Here are possible things you can do:

*  Redraw the symbol.  Yes, it's a PITA, but part of doing designs is
drawing symbols.

*  If the symbol has implied power pins (net= attribute), then just
stick your decoupling cap on the same schematic sheet and attach it to
your power net and GND.  To attach to the power net, just draw a net
from the cap, and then give the net a netname= attribute.

Another way is to draw a separate symbol for the power and ground pins, and then give it the same refdes as the powerless symbol. Now you can have a perfectly explicit drawing of power distribution, but avoid cluttering the signal flow drawing with that stuff. This works for most gnetlist back ends, but unfortunately not for spice-sdb.


Stuart, can this be fixed? Your spice-sdb gives the obscure "Invalid wanted_pin passed to gnet-nets [unknown]" error when it sees a duplicate refdes. The reason I ask is that I'm retrofitting my chip design to have explicit power distribution (ah, the joy of changing customer requirements ;-).

John Doty              Noqsi Aerospace, Ltd.
jpd@xxxxxxxxxxxxx