Re: gEDA-user: icarus 0.8 code gen doesn't like my design -- anyone seen this error?

[Mark Schellhorn <mark@xxxxxxxxxxxxxxxxxx>]

I managed to reproduce this one with a simple testcase:

module junk (clk);
   input clk;

   parameter depth = 10240;
   parameter width = 36;

   reg [depth*width-1:0] mem;

   reg [31:0] 		 foo;
   reg [31:0] 		 bar;

   always @(posedge clk) begin
     foo <= mem >> bar;
   end
endmodule

Compiling this module gives me:

ivl: vector.c:86: allocate_vector: Assertion `(base + idx) < (256*1024)' failed.

If I reduce the size of the mem vector then it works. The bad news for me is 
that my problem code is inside a Xilinx block RAM library cell, so I can't just 
code around it without changing the RAM configuration of the design :(.

   Mark


Stephen Williams wrote:
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> Mark Schellhorn wrote:
> | I'm trying to debug the following error message from iverilog when
> | compiling my design with icarus v0.8.1:
> |
> | CODE GENERATION -t dll
> |  ... invoking target_design
> | ivl: vector.c:86: allocate_vector: Assertion `(base + idx) < (256*1024)'
> | failed.
> |
> | It looks like maybe a vector is too large and causes a run-time error?
> | I've gone thru the code and reduced my large vectors one-by-one to see
> | if that fixed things but the problem still occurs.
>
> No one's reported this sort of error to me before, and it does indeed
> look like there is a vector being processed that is too wide, although
> it may also be a case of a allocate_vector bit leak.
>
> - --
> Steve Williams                "The woods are lovely, dark and deep.
> steve at icarus.com           But I have promises to keep,
> http://www.icarus.com         and lines to code before I sleep,
> http://www.picturel.com       And lines to code before I sleep."
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