Re: gEDA-user: Design Flow Roadmap starting point

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

>> While I am at it. PCB should be able to do hidden vias, buried vias
>> and micro vias...
>>     
>
> If we can get the "layer types" project done (this is listed as the
> non-copper layers project in SoC), we'll be able to have a concept of
> a "layer stack" (unless we just assume the physical stack matches the
> GUI layer layout).
>
> The next project after that is what I call a "multi-pin", which is a
> standard pin, but with a much more intense copper description, one for
> each layer, with drill depth parameters et al.  That would include
> blind and buried vias.  Microvias is just a drill size after that,
> unless you need them called out in a different .cnc file
>
>   
No a micro via should be the same in the the cnc file. The PCB fab shop
will deside how to drill the hole.


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