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Re: gEDA-user: What is the standard of gEDA tools and PCB
On Friday, May 16, 2003, at 02:31 AM, Stephen Meier wrote:
Terry Porter wrote:
I'm not a hacker tho I do low level C embedded stuff, but such a
feature sounds quite complex to implement ? I see a situation with
every track vying for the shortest distance!
Since we pay for our own development and make the cost back in
sales.... any type of short makes me woried ;)
You should try DJ's trace optimizer to see what improvements PCB can
handle-- since it works within the PCB framework (i.e. it manipulates
standard traces and vias), you can always run the DRC routine to check
the traces against the netlist. (The built-in DRC checks both
clearances and minimum trace widths, IIRC).
--
Charles Lepple <clepple@ghz.cc>
http://www.ghz.cc/charles/