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gEDA-user: netlist PCB



Hello List,

I have some strange behavior with the pcb to routing net's. 
On the DRC check it is all fine but the Yellow Rat lines do some shorting stuff. in the PCB layout. And i'am wondering why this comes together. If i check the project.net file it looks all fine ? there are no shorts !!

is there a way to check the pcb net's to find unused, shorted or strange net's ? Like a electric test from/to the .pcb = .sch files ?

i use the following version:

PCB version 20091103
gEDA/gschem version 1.6.0.20091004
On a Mac os X 10.6.3

thanx's a lot

michael
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