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Re: gEDA-user: PCB gcode generation

Am 01.05.2011 um 03:18 schrieb Peter Clifton:

As a feature request which came from that discussion, it seems that it
might be nice to provide the option of special casing the handling of
"outline" layers.

The expected convention is to put a narrow series of lines around the
boards to denote their outline, the path of these lines forms the the
centre-line of the finished board. The problem we were addressing is
that the gcode export (not unreasonably) treated this as a track to be
isolation routed.

See patches 0018 ... 0020:

<https://bugs.launchpad.net/pcb/+bug/699497/+attachment/1786373/ +files/0018-HID-gcode-don-t-do-isolation-milling-on-the-outline-.patch> <https://bugs.launchpad.net/pcb/+bug/699497/+attachment/1786374/ +files/0019-HID-gcode-fetch-the-board-s-extents-from-the-outline.patch> <https://bugs.launchpad.net/pcb/+bug/699497/+attachment/1786375/ +files/0020-HIG-gcode-limit-the-produced-G-code-to-the-outline.patch>


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Dipl. Ing. (FH) Markus Hitter

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