Re: gEDA-user: Increment drill size on 344 vias

[John Griessen <john_g@xxxxxxxxxx>]

John Coppens wrote:

> > The pcb commands will take only vias from the selected set and change
> > them.
>
> That said, it _would_ be very helpful to have something else available
> except the +/- 10 mils fixed step (not only for holes, also for track
> widths etc)


> I'm not too experienced a programmer, but I'm willing to help out...
>
> John


[jg]
We don't have easy to user program dialogs yet, but you should do the lesstif 
pcb compilation, so you can assign your own bindings to keys.

You can still put commands in the command window as is, and copy and paste them 
from a list you keep ready while doing layout.

The key binding code for what you ask looks like this for the <ctrl>v key as an 
example:
  {"decrease line 4 mils"  a={"Ctrl-l 4" "Ctrl<Keys>l4"} 
ChangeSize(SelectedLines, -4,mil) }

  {"decrease line 6 mils"  a={"Ctrl-l 6" "Ctrl<Keys>l4"} 
ChangeSize(SelectedLines, -6,mil) }
  {"decrease line 3 mils"  a={"Ctrl-l 3" "Ctrl<Keys>l3"} 
ChangeSize(SelectedLines, -3,mil) }

Once you have these in your local pcb-menu.res file, (and are using the lesstif 
compilation of pcb), you can press <ctrl>v followed by the second key press to 
get the amount.  (The second key doesn't have to be integer amounts, I just set 
it up this way....)

An example for increasing Vias:

    {"incr via/drill 4 mils"  a={"Ctrl-V 4" "Ctrl<Keys>v4"} Atomic(Save) 
ChangeSize(SelectedVias,+4,mil) Atomic(Restore) ChangeDrillSize(SelectedVias, 
+4, mil) Atomic(Block)}

Increasing and decreasing need separate first key press binding for this scheme 
of doing things.


It would be nice to have some general guile/scheme/LISP/Skill  way to hook into 
the core functions of pcb code, and work toward all of that being able to act on 
any hierarchical piece of layout.  That's how Cadence chip design tools work. 
Glad Dan is thinking along those lines.

If we made it work that way, maybe someone would eventually write in the gnetman 
database engine so the size of layout that could be handled would be huge enough 
for chips as well as boards.  That would make sense once we made the file-based 
functioning of pcb modeled after Cadence layout.

John Griessen








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