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Re: gEDA-user: Programming Altera FPGAs without Quartus



Antonio Bergnoli <bergnoli@xxxxxxxxxx> wrote:

> I know two of such open source software:
> -flexloader
> -openwince-jtag

I wasn't talking about the physical loading of the SOF into the chip, I
was talking about the *generation* of the SOF on the development host
from EDIF (Icarus Verilog output), i.e., the fitter, place and route,
and final SOF generator.

MS