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Re: gEDA-user: pcb bug, silk line is green

Am Freitag, den 03.10.2008, 02:05 +0200 schrieb Stefan Salewski:

> I will start from scratch tomorrow -- maybe I can reproduce it.
> 

It's very easy to reproduce:

stefan@AMD64-X2 ~/gEDA/DAD $ rm -r ~/.pcb/
stefan@AMD64-X2 ~/gEDA/DAD $ pcb

Select line tool and make silk layer active.
Draw a line -- it is black.

Select Settings/Auto enforce DRC clearance from Menu.

Draw a line -- is is green.

Have I to file a bug report to sourceforge, or is this report
sufficient?

Regards

Stefan Salewski





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