Re: gEDA-user: slot, pinnumber and pinseq attributes - how to work with them?

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Sun, 2008-10-12 at 06:18 +0000, Alexander Gvozdev wrote:
> On Sunday 12 October 2008 02:03:07 DJ Delorie wrote:
> > Create four separate symbols, each with the right pin numbers for that
> > portion of the chip.  In the schematics, give them all the same
> > refdes.  The netlister does the right thing with them.
> >
> > You don't need to mess with slotting for such things unless you're
> > designing your asic with multiple *identical* subcircuits and want to
> > slot *those*.
> Ok.
> But what if i want refdes like DD1.1, DD1.2 DD1.3 & etc?

As DJ said, you need one refdes common to all parts. PCB actually
ignores lower case letter suffixes, like DD1a DD1b (it treats them as
the same chip, DD1), however this is just PCB, probably a design
mistake, and the other tools won't play nicely with it.

If you want, you could hide the refdes=DD1 attribute on each of the
symbols, then add a visible attribute, such as "label=DD1".

(I use that idiom quite a lot with connectors and power symbols, which
have "net=my_net_name:1", and a visible "label=my_net_name"

Of course.. this could lead to _REALLY_ hard to debug problems if you
change the visible one and not the hidden one, so caveat emptor!


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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