gEDA-user: DRC problem - Line with insufficient clearance

[Hugo Elias <hugo@xxxxxxxxxxxxx>]

Hi all,

   I am having a nightmare problem with the DRC, which
I can't seem to fix.

To recreate this problem:

Start a new PCB
Draw a rectangle
Draw a line through it, with "clearline"
Press Shift+K on the line to reduce the clearance, until it stops reducing.
Now run the DRC.

The line will fail the DRC.

Now, this wouldn't be so much of a problem, since you could
just press K again to fix it. The problem is I have a PCB with
thousands of lines, many of which fail the DRC for this reason.
It would take days to go through them by hand.

I have mentioned this in the bug forum, but until PCB automatically
fixes this kind of thing, I am stuck with the failures, and can't
verify the PCB.

Has anyone had this problem, and does anyone know how to fix it
automatically?

Many thanks
Hugo




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