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Re: gEDA-user: a pcb level panelizer tool
Levente Kovacs wrote:
> On Sat, 13 Sep 2008 12:21:29 -0400
> DJ Delorie <dj@xxxxxxxxxxx> wrote:
>> Other than that, I like it.
Me too -- the specifying is so short and simple by being relative, and
you get to array onto existing circuit area (your bolt holes) easily.
Both of you use makefiles. I need to study Levente's published stuff on
them so I can understand DJ's back annotate script excerpt:
--snip--
CHANNELS = \
> $(foreach c,1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
20,dups/channel${c}.sch)
>
> all : $(CHANNELS)
>
> dups/channel%.sch : channel.sch
> page-renumber -n '.*' -s 10 -e 19 -b $*0 channel.sch - \
> | page-renumber -re 'netname=.*1' -s 1 -e 2 -b $* - $@
--snip--
John G
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