gEDA-user: Strange behaviour of gsch2pcb/gnetlist

[michalwd1979 <michalwd1979@xxxxx>]

Hello,
I'm working on quite big design (about 650 elements) and I just experienced strange results in pcb file generated by gsch2pcb/gnetlist. The schematic uses big main sheet and one small second level sheet added to main by symbol with source attribute. In my project file I have then

schematics digital_1.sch digital_psu_1.sch
output-name digital_board

And I call gsch2pcb with this command: gsch2pcb -v --use-files project

First strange thing is that generation of pcb file takes about 2 minutes on 3Ghz Xeon CPU. Is this normal for big projects?
Second is that in pcb file some of the elements from second level sheet are included twice. For example I have R400 in digital_psu_1.sch and in pcb file I get
R400 and S11/R400 (S11 is the reference of the sheet symbol on main sheet). These 2 elements have the same footprint/value. DRC of the project goes without errors.
Funny thing that only some of the elements are added twice most (more then 90%) are placed correctly. 

Do You have any ideas about this? Is this a strange bug or maybe I'm doing something wrong?

Best Regards,
Michael Widlok




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