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gEDA-user: gnetlist segmentation fault



I have an application which causes a seg fault in gnetlist.  I think
this can be fixed by changing the schematic.  But, Segmentation fault
is NEVER the proper response.

# gnetlist -g geda ulf-ant.sch
Loading schematic [/usr/home/tomdean/Electronics/Spice/ulf-ant/ulf-ant.sch]
Segmentation fault (core dumped)

tomdean

====ulf-ant.sch=============================
v 20100214 2
C 19500 47500 1 0 0 lf353-1.sym
{
T 19500 48600 5 10 1 1 0 0 1
refdes=U101A
T 19500 48400 5 10 1 1 0 0 1
device=AD797
T 19500 47500 5 10 0 0 0 0 1
slot=1
}
C 19500 42700 1 180 1 lf353-1.sym
{
T 19600 41700 5 10 1 1 180 6 1
refdes=U102A
T 19600 41400 5 10 1 1 0 0 1
device=AD797
T 19500 42700 5 10 0 0 0 0 1
slot=1
}
C 28500 45400 1 0 0 lf353-1.sym
{
T 28500 46700 5 10 1 1 0 0 1
refdes=U103A
T 28500 46500 5 10 1 1 0 0 1
device=AD797
T 28500 45400 5 10 0 0 0 0 1
slot=1
}
C 18500 47200 1 90 0 resistor-1.sym
{
T 18200 47400 5 10 1 1 90 0 1
refdes=R101
T 17700 46900 5 10 1 1 0 0 1
value=100Meg
}
C 27300 49100 1 270 1 capacitor-1.sym
{
T 27100 49200 5 10 1 1 90 2 1
refdes=C101
T 28200 49300 5 10 0 0 90 2 1
symversion=0.1
T 26800 49800 5 10 1 1 0 0 1
value=1000uf
}
C 15200 39800 1 0 0 title-B.sym
C 18500 42100 1 90 0 resistor-1.sym
{
T 18200 42300 5 10 1 1 90 0 1
refdes=R102
T 17700 43100 5 10 1 1 0 0 1
value=100Meg
}
C 26000 49100 1 270 1 resistor-1.sym
{
T 26300 49300 5 10 1 1 90 2 1
refdes=R103
T 26700 49300 5 10 1 1 90 0 1
value=10k
}
C 26000 48100 1 270 1 resistor-1.sym
{
T 26300 48300 5 10 1 1 90 2 1
refdes=R104
T 26700 48300 5 10 1 1 90 0 1
value=10k
}
C 28100 49100 1 270 1 capacitor-1.sym
{
T 27900 49200 5 10 1 1 90 2 1
refdes=C102
T 29000 49300 5 10 0 0 90 2 1
symversion=0.1
T 27800 49800 5 10 1 1 0 0 1
value=100uf
}
N 30700 50000 26100 50000 4
{
T 30300 50100 5 10 1 1 0 0 1
netname=Vcc
}
N 26100 49100 26100 49000 4
C 25700 48800 1 0 1 gnd-1.sym
N 26100 48100 26100 48000 4
N 27500 48000 27500 49100 4
N 29100 49100 27500 49100 4
C 20400 47200 1 180 0 resistor-1.sym
{
T 20200 46900 5 10 1 1 180 0 1
refdes=R105
T 19700 46600 5 10 1 1 0 0 1
value=27k
}
C 19400 45400 1 90 0 resistor-1.sym
{
T 19100 45600 5 10 1 1 90 0 1
refdes=R106
T 19500 45800 5 10 1 1 0 0 1
value=1k
}
C 20400 43300 1 180 0 resistor-1.sym
{
T 20100 43500 5 10 1 1 180 0 1
refdes=R107
T 19600 43600 5 10 1 1 0 0 1
value=27k
}
N 19500 47700 19300 47700 4
N 19300 47700 19300 46300 4
{
T 18900 47400 5 10 1 1 0 0 1
netname=fb1
}
N 19500 42500 19300 42500 4
N 19300 42500 19300 44200 4
{
T 18900 43100 5 10 1 1 0 0 1
netname=fb2
}
N 19300 47100 19500 47100 4
N 19300 43200 19500 43200 4
N 20500 47900 20500 47100 4
N 20500 47100 20400 47100 4
N 20400 43200 20500 43200 4
N 20500 43200 20500 42300 4
C 21600 42400 1 180 0 resistor-1.sym
{
T 21400 42100 5 10 1 1 180 0 1
refdes=R108
T 20900 41800 5 10 1 1 0 0 1
value=27k
}
C 21600 48000 1 180 0 resistor-1.sym
{
T 21400 47700 5 10 1 1 180 0 1
refdes=R109
T 20900 47400 5 10 1 1 0 0 1
value=27k
}
N 20500 47900 20700 47900 4
{
T 20400 48200 5 10 1 1 0 0 1
netname=3
}
N 20500 42300 20700 42300 4
{
T 20600 42600 5 10 1 1 0 0 1
netname=4
}
N 18400 47200 18400 43000 4
N 20000 42700 20000 42800 4
{
T 19700 42900 5 10 1 1 0 0 1
netname=Vdd
}
N 20000 41800 20000 41900 4
{
T 20200 41700 5 10 1 1 0 0 1
netname=Vcc
}
N 20000 47400 20000 47500 4
{
T 20200 47300 5 10 1 1 0 0 1
netname=Vdd
}
N 20000 48300 20000 48400 4
{
T 20100 48500 5 10 1 1 0 0 1
netname=Vcc
}
C 29400 45100 1 180 0 resistor-1.sym
{
T 29200 44800 5 10 1 1 180 0 1
refdes=R115
T 28800 44500 5 10 1 1 0 0 1
value=27k
}
N 28300 45000 28500 45000 4
N 29600 45800 29600 45000 4
N 28300 45600 28300 44700 4
N 29000 45300 29000 45400 4
{
T 29100 45200 5 10 1 1 0 0 1
netname=Vdd
}
N 29000 46200 29000 46300 4
{
T 29100 46400 5 10 1 1 0 0 1
netname=Vcc
}
N 28300 43200 28300 43800 4
{
T 28500 43200 5 10 1 1 0 0 1
netname=GND
}
C 28900 49100 1 270 1 capacitor-1.sym
{
T 28700 49200 5 10 1 1 90 2 1
refdes=C103
T 29800 49300 5 10 0 0 90 2 1
symversion=0.1
T 28800 49800 5 10 1 1 0 0 1
value=1uf
}
C 31200 45900 1 180 0 resistor-1.sym
{
T 31000 45600 5 10 1 1 180 0 1
refdes=R117
T 30500 45300 5 10 1 1 0 0 1
value=47
}
N 31200 45800 31400 45800 4
{
T 31300 45900 5 10 1 1 0 0 1
netname=Vout
}
C 29600 48800 1 0 0 vdc-1.sym
{
T 30300 49450 5 10 1 1 0 0 1
refdes=V101
T 30300 49250 5 10 1 1 0 0 1
value=DC 6V
}
C 15700 46800 1 0 0 vsin-1.sym
{
T 16400 47450 5 10 1 1 0 0 1
refdes=V102
T 16400 47250 5 10 1 1 0 0 1
value=sin 0 1e-5 1khz
}
C 15700 42300 1 0 0 vsin-1.sym
{
T 16500 42850 5 10 1 1 0 0 1
refdes=V103
T 16300 42550 5 10 1 1 0 0 1
value=sin 0 1e-5 1khz
}
N 16000 48100 19500 48100 4
{
T 16300 48200 5 10 1 1 0 0 1
netname=1
}
N 16000 48100 16000 48000 4
N 16000 42100 19500 42100 4
{
T 16400 41800 5 10 1 1 0 0 1
netname=2
}
N 16000 42100 16000 42300 4
N 16000 46800 16000 43500 4
N 16000 45600 18400 45600 4
{
T 16100 45700 5 10 1 1 0 0 1
netname=GND
}
N 29600 45000 29400 45000 4
N 29500 45800 30300 45800 4
{
T 29600 46000 5 10 1 1 0 0 1
netname=9
}
T 24300 45700 9 10 1 0 0 0 1
100 ft. Twisted Pair (CAT-5)
C 20500 49700 1 0 0 spice-include-1.sym
{
T 20600 50100 5 10 1 1 0 0 1
refdes=A102
T 21000 49800 5 10 1 1 0 0 1
file=ad797.cir
T 20500 49700 5 10 1 0 0 0 1
netname=
}
T 26400 40900 9 10 1 0 0 0 1
ELF ANTENNA
C 19400 44200 1 90 0 resistor-1.sym
{
T 19100 44400 5 10 1 1 90 0 1
refdes=R118
T 19500 44600 5 10 1 1 0 0 1
value=1k
}
N 19300 45400 19300 45100 4
N 19300 45300 20300 45300 4
N 20300 45300 20300 44900 4
{
T 20400 45000 5 10 1 1 0 0 1
netname=Vbias
}
C 25100 48200 1 270 1 capacitor-1.sym
{
T 24900 48300 5 10 1 1 90 2 1
refdes=C104
T 26000 48400 5 10 0 0 90 2 1
symversion=0.1
T 24600 48900 5 10 1 1 0 0 1
value=1000uf
}
N 25300 48000 25300 48200 4
C 24100 48200 1 270 1 capacitor-1.sym
{
T 23900 48300 5 10 1 1 90 2 1
refdes=C105
T 25000 48400 5 10 0 0 90 2 1
symversion=0.1
T 23800 48900 5 10 1 1 0 0 1
value=100uf
}
N 24300 49100 26100 49100 4
{
T 25300 49200 5 10 1 1 0 0 1
netname=Vbias
}
N 24300 48000 31300 48000 4
{
T 30300 47800 5 10 1 1 0 0 1
netname=Vdd
}
N 24300 48000 24300 48200 4
C 27300 43800 1 90 0 resistor-1.sym
{
T 27000 44000 5 10 1 1 90 0 1
refdes=R120
T 26700 44000 5 10 1 1 90 0 1
value=27k
}
N 27200 44700 27200 46000 4
N 28300 43700 27200 43700 4
N 27200 43700 27200 43800 4
C 28400 43800 1 90 0 resistor-1.sym
{
T 28100 44000 5 10 1 1 90 0 1
refdes=R116
T 27800 44400 5 10 1 1 270 0 1
value=27k
}
C 31600 48000 1 180 0 vdc-1.sym
{
T 30900 47350 5 10 1 1 180 0 1
refdes=V104
T 30900 47550 5 10 1 1 180 0 1
value=DC 6V
}
N 29900 48800 29900 48700 4
N 31300 46800 31300 46700 4
C 30000 48400 1 0 1 gnd-1.sym
C 31400 46400 1 0 1 gnd-1.sym
T 29100 44100 9 10 1 0 0 0 1
Add 2nd Stage With gain control
N 21600 46000 28500 46000 4
{
T 26400 46100 5 10 1 1 0 0 1
netname=7
}
N 21600 46000 21600 47900 4
N 21600 45600 28500 45600 4
{
T 26400 45300 5 10 1 1 0 0 1
netname=8
}
N 21600 45600 21600 42300 4

====lf353.sym===============================
v 20060123 1
L 200 0 200 800 3 0 0 0 -1 -1
L 200 800 800 400 3 0 0 0 -1 -1
L 800 400 200 0 3 0 0 0 -1 -1
T 575 900 5 10 0 0 0 0 1
device=LF353
T 600 1500 5 10 0 0 0 0 1
numslots=2
T 575 1350 5 10 0 0 0 0 1
slotdef=1:1,2,3,4,8
T 575 1200 5 10 0 0 0 0 1
slotdef=2:7,6,5,4,8
T 575 1050 5 10 0 0 0 0 1
slot=1
T 600 1650 5 10 0 0 0 0 1
footprint=DIP8
P 200 600 0 600 1 0 1
{
T 50 625 5 8 1 1 0 0 1
pinnumber=3
T 50 425 5 8 0 1 0 0 1
pinseq=1
}
P 200 200 0 200 1 0 1
{
T 50 225 5 8 1 1 0 0 1
pinnumber=2
T 50 25 5 8 0 1 0 0 1
pinseq=2
}
P 800 400 1000 400 1 0 1
{
T 875 425 5 8 1 1 0 0 1
pinnumber=1
T 975 525 5 8 0 1 0 0 1
pinseq=5
}
P 500 200 500 0 1 0 1
{
T 525 50 5 8 1 1 0 0 1
pinnumber=4
T 625 150 5 8 0 1 0 0 1
pinseq=4
}
P 500 600 500 800 1 0 1
{
T 525 650 5 8 1 1 0 0 1
pinnumber=8
T 425 750 5 8 0 1 0 0 1
pinseq=3
}
L 250 600 350 600 3 0 0 0 -1 -1
L 300 650 300 550 3 0 0 0 -1 -1
L 250 200 350 200 3 0 0 0 -1 -1
T 225 350 9 8 1 0 0 0 1
LF353
T 200 900 8 10 1 1 0 0 1
refdes=U?


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