Re: [f-cpu] the wrong way (or not?) concerning FP

[Yann Guidon <whygee@f-cpu.org>]

hi,

Juergen Goeritz wrote:
> On Tue, 28 Aug 2001, Yann Guidon wrote:
> > i would preferably go for the last solution, unless someone
> > (a big genius) creates a very very good FP unit that performs
> > complex operations in a non blocking way. THAT is a challenge
> > (and a very interesting one).
> 
> What do you mean by complex operations?
> sqrt(), log(), cos(), sin(), ...?

"simple" operations are fadd/fsub and fmul.
of course the conversion operations are necessary
(FP<->int, truncation, fractional part...) and should be
simple (at least most of them).

division and sqrt require several Newton-Raphson steps, using
floating point multiply and add/sub. Because it is better to reuse
the existing units, fdiv and fsqrt have to share them with
the "normal" operations.

However, for the first FC0s, the fdiv and fsqrt will have to
be emulated with a "invalid opcode" trap.

> I think a floating unit will be fine with add, sub, mul, div
Unless you know a good unit that perform fdiv quickly and without
using too much ressources, why not.

> and maybe muladd. And I expect that it could be designed in
> pipelined operation to give single cycle average execution
> time. A 64 bit floating number unit would be just enough for
> a start because you can convert any AD sampled 32bit integer
> value into this format... Who needs more accuracy?
> 
> So why divide into integer and floating unit? Add those
> basic floating functionality to *the* f-cpu unit.
i think that it will be complex, if you mean what i have
understood. But you can remember that the register set
stores all kinds of data, so the FP EU can not be taken
outside of the F-CPU core. So there is no "division".

> If you want to add the complex function stuff like sin()
> it gets more complicated and you get rid of pipelining the
> instructions due to longer delays for the results and reuse
> of the units. It will be more of a microcode thing then or
> better say it this way, you end up with ordinary FPU design.
> 
> But actually most brute force problems I know don't have a
> need for the complex functions but for a high performance
> in basic arithmetics. Complex functions could be emulated
> by software anyway. Am I right?
right.

> Are there any intelligent algorithms for fast emulation of
> the complex functions? This exceeds my experience (logic,
> network and software design on all layers) but I would
> volunteer on this part ;-)
last time i searched, i found some informations about FP unit
design. i even posted a web page about it. that's a good starting
point if you want to volunteer. What we need now is fadd/fsub
and fmul in IEEE 32-bit and 64-bit format. From that, we can
derive all the rest.

good luck :-)

> JG
WHYGEE
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