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[f-cpu] TLB resume



Here is an extract from the TLB discussion that append one month ago.

Michael propose this :
"
I've been thinking about the TLB before; IMHO, we need at least the
following (assuming <n> bits for the page offset):

        - virtual address (64-<n> bits)
        - physical address (64-<n> bits)
        - address space identifier (ASI; 8 bits was suggested)
        - supervisor access rights (RWX, 3 bits)
        - user access rights (RWX, 3 bits)
        - valid bit (indicating that the entry is valid)
        - dirty bit (indicating that the page has been written to)
        - used bit (indicating that the page has been accessed)

	- page size (4K << size, 6 bits)
"

"present bits" has been removed because it's only needed by HW TLB after the 
discussion. I hope I have maid a good resume, but if someone want to add 
something, before I add this to the manual (perhaps we must clarify how to
access it before).

Cedric


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