Re: [f-cpu] back to VHDL

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Feb 11, 2002 at 06:26:09AM +0100, Yann Guidon wrote:
[...]
> here we speak about the bi-directionality of the unit, which is another
> problem. One way to design the LSU is to use byte-wide write enables
> and "dirty" bits, so what we have to do is shift the written word
> so that it appears on the correct "alignment". If we don't
> use the SHL, the shift spans 256 bits (with a maximum of 32 positions).

It's not necessary to shift the word-to-write. First duplicate the least
significant chunk (i.e., perform an SDUP), then duplicate the word until
the cache line size is reached. After that, do a partial write.

Reading is slightly different - get the correct word from the cache line,
then do a little byte-shuffling (since we have alignment constraints,
a word will not cross an 8-byte boundary).

[...]
> So there are 3 different units ?
>  - 1 bytewise SIMD (word-slices)
>  - 1 bitwise (shifts, rotations...)

These two are currently implemented in the SHL, but I can separate
them if necessary.

>  - 1 for the LSU (in fact 2 : one for each direction)
> it's going to take some room...

Not really.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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