Re: Re: [f-cpu] new manual version

[whygee@club-internet.fr]

hi !

Ben Franchuk :
>Yann Guidon wrote:
>> in the most recent version, i simply use a 4-input MUX :-)
>> the "logic" transformation is performed by a LUT during the
>> decoding or Xbar cycle. look at the "stable" source code.
>Hmm I see where I got confused. Looking at the well written
>but un-readable VHDL code
thank you ;-) if you have remarks, i'm ready to include your enhancements.

> I can see where I got confused.
>Your logic is still simpler than mine but had you written
>
>Out = F1 * /A * /B
>    + F2 * /A * B
>    + F3 * A  * /B
>    + F4 * A  * B
That is what i wrote long ago, at the beginning.
However, this summer, i finally realized that it was indeed
a MUX :-)

>I would have got less confused.
This is a problem : if it is "human readable" the synthesier
creates bloated logic, while the "optimized" version makes
a compact and efficient version (that can be easily inferred
by the synthesiser)  but it is less "obvious" for the reader. 

At a time, i had left the original version in comments.
It is probably erased now.

> The logic I had does look
>like it would make a nice generic ALU ( but not for the F-CPU)
>if I add carry logic.
i see.

>Would modified INC/DEC unit be useful for +2,4,8 -2,4,8 constants
>and another INC/DEC instruction. I am thinking of a language like
>FORTH where they pop and push stuff on a stack like mad and use 
>of the general adder could be a bottle neck on this kind of address
>calculation.

for push and pop, use post-incremented pointers.


have fun,
>Ben Franchuk - Dawn * 12/24 bit cpu *
YG

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