Re: [f-cpu] by the way

[Yann Guidon <whygee@f-cpu.org>]

hi,

gaetan@xeberon.net wrote:

> by the way one other question:
> ieee defines 4 rounding modes (round to nearest, to + infinity, to 
> -infinity and to Zero), so i put a input in the architecture:
>      RoundMode: in std_ulogic_vector(1 downto 0); -- 00 : nearest, 01: 
> zero, 10: +inf, 11: -inf
> But how will it be implemented higher? special register changed by an 
> instruction? or directly from the instruction?
>
> I propose:
> flags 19-18 (unused for the moment) : rounding mode
> and for the instruction synthax:
> no postfix : rounding to nearest (default)
> ".RPI" : Round to + Infinity
> ".RMI" : Round to - Infinity
> ".RZ" : Roung to Zero (or ".RZO")
>
> And for Size postfix synthax (not defined for the moment in the 
> manual), why not
> ..32 : single operation
> ..64 : double operation
>
> so instruction would look like:
> fadd.64 R4, R3,R2
> for double float operation with round to nearest mode.
>
> sfadd.32.RZO R8,R7,R6
> for single SIMD operation with round to zero mode.
i'm not sure yet, it's a possibility.
one parameter is the patents : i guess that most implementations
use a "special configuration register" for this, and it's likely to
be covered by patents, so we usually chose the other solution.

i'll have to check that, but i have no time at this very moment.
it also depends on what room remains in the opcodes.

> An other thing: how do you plan to manage exception when they occurs? 
> I mean, when a exception occurs (ieee flag clear), the unit will ouput 
> an exception flag, and the ieee standard wants it to stay raised 
> untill an special instruction clear it...

when an exception is detected, the pipeline is not filled with
the following instructions, but a handling code is fetched and executed.

"flags", particularly for FP and carry etc. create potential problems
in more sophisticated architectures : the famous bottlenecks.
so it is not likely that a single flag will be used.

however, the register set will also contain a "property bit"
that indicates an error condition and, if the IEEE compliance
flag is not used, the result would be NaN or another "special pseudo-value".
this is necessary to restore the flag after a task switch.
Then, a conditional instruction can jump to a specific code on this case :
 if r25.nan jump r12

other ideas welcome.

YG

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