Re: Tr:Rep:Re: [f-cpu] "Tree"

[Juergen Goeritz <goeritz@oekomm.de>]

On Fri, 11 Jan 2002 nicolas.boulay@ifrance.com wrote:
> Why convert to RTL code. Every synchronous
> statemachine can
> directly be translated into a function table without
> thinking.
> 
> The only statemachines I have great respect of are
> those
> that treat each input signal as a clock and remember
> the
> contence by the device delay feedback only (no
> registers).
> 
> >>>> A nice feed back asynchronous loop ! I don't
> think that a verifing tools could handel that.
> (static timming analyser,...). I don't that will be
> allow to produice such design by a foundry. It could
> be done only by hand with a very specific technology,
> so it will not be portable at all.

You are right - it is very much technology dependent
and I stated above that I have great respect of these
designs. I would not want to use any if there are
other possibilities.

> >>>>>>Maybe you should read about F21. It's a
> complete assynchonous design. It run at 2 ns for a
> cycle for a 0.8um technology. It doesn't use neither
> double rail logic nor hand checking. I was in contact
> with one of the guy from  the team who write it. But
> i don't know how they time there cpu.

Do you have a URL or email address? I am just curious.

JG

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