Re: [f-cpu] PS

[nicO <nicolas.boulay@ifrance.com>]

What ever fixed number of semaphore you will put they will never have
enought. So hardware semaphore  must be designed to handel software
semaphore. 

(I just remind you that a posix semaphore is a counter not a flag.) 
This HW semaphore will be used to protect memory area of the true
semaphore .So we will need only _one_ semphore to handel that.

Or we can use an other kind of sync things. Have you ever hurd about
super step model ?

It could represent by a wait&sync instruction. This instruction wait
that every core are stoped with this instruction before releasing them
in the same time (in NUMA system, caches are updated just before). It's
much easier to programme multi-cpu application that way (a compiler that
compile for 2 or more cpu).

nicO
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