Re: [f-cpu] Conditionnal Load and Store

[Yann Guidon <whygee@f-cpu.org>]

hi !

nico wrote:
> Michael Riepe a écrit :
> > On Fri, Jul 26, 2002 at 04:57:32PM +0200, Yann Guidon wrote:
> > [...]
> > > ***************************************************************
> > > HOWEVER I HAVE A BIG PROBLEM WITH THE MSB CONDITION CODE !
> > > i believe i told this on the list, but no solution is known yet.
> > >
> > > Currently, the "MSB" condition just takes the 63th bit of the
> > > pointed register. But what about larger registers ? what about
> > > small integers ?
> >
> > Proposed fixes:
> >
> >         a) always use bit 63
> >         b) always use the most significant bit
> >         c) drop the MSB condition thing altogether
> >         d) never build an F-CPU with registers wider than 64 bits
> 
> Can we used the usual SIMD bits ? so we will use the 63 or the 31 or the
> 15 or the 7 bits.
we don't have enough room in the opcode for that.

> d) solution aren't possible ! ;p
i think it was Michael's humour :-)

> (i'm for thinking with 256 bits registers).
me too.

> I think in that case that we used the register as a scalar
> value (not a packed one for SIMD stuff). In the case of 256 bits
> registers, the scalar chunk of 64-32-16-8 bits are still there. If "int"
> is 64 bits long it's not a hard point to always read the 63th bits of
> the register. Maybe the 31th will be better (it's a true "C int" size).
RIP, C.

> solution b) have no sense on a 256 bits register set. It will read the
> 255th bit but we work only with the 0-63 first bit on scalar operation
> (that's an other point but : "What a waste by only using a quarter of
> the register !" (why not using 2 registers set : on scalar and the other
> SIMD)).

As i have written before (maybe differently), we don't have enough room
to specify the "tested" size.

We only have 3 bits : one bit inverts the result of the 2-bit condition.
it's rather minimal. but if we select a specific bit inside the register,
then this involves a mux and even with 4 inputs, the problem is the
length of the wires (going from bit 63 to bit 8...)

Another problem is that the instructions that use the 3-bit condition
also use the 2-bit size field and we don't have any room left !

One "good" solution would be to find another bit => the condition would take
4 bits, including the negation. the 3 other bits would be :

 0 1 2
 0 0 0 ZERO
 0 0 1 LSB
 0 1 0 FP
 0 1 1 dirty
 1 0 0 MSB8
 1 0 1 MSB16
 1 1 0 MSB32
 1 1 1 MSB64

but as i said, there is no room in the instructions that use this field :-/
we simply need *1* bit :-(

is there any room to take it from the opcode ?

> nicO
WHYGEE
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