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[f-cpu] CMP

   For what its worth;
    I use the equivalent of an SN7485 Comparator for a 64 bit result of EQU, AGB, and ALB.  Requires 113 Logic cells of the Eclipse family of FPGA devices.  It requires 7 logic levels and executes in 10.2 NS plus setup time of three DFF's.  I can test and Branch on each of the registered outputs.
    If my Canadian counterpart (Ben) will send me his mailing address, I will send him an VHDL manual that I will never use.
Dick Hartney