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Re: [f-cpu] use of 1r1w regfile for our 3r2w regfile
hi,
nico@seul.org wrote:
To speed up regfile look up, we could use 4 1r1w regfile which introduice
4r4w port . In case of colliding, one clock cycle is lost.
My question is : Is that possible for the compiler to try to avoid such
bubble ?
have a try and tell us the result.
nicO
YG
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