Re: [f-cpu] asynchronous circuits

[Yann Guidon <whygee@xxxxxxxxx>]

hello,
and welcome abord this completely fucked up project ;-P

Jerry wrote:

> Has implementing the f-cpu with asynchronous circuits been considered?
> I have read that up to 40% of total power consumption is due to the 
> global clock in a cpu, and asynchronous circuits would have other 
> advantages as well.


Let's go back to some things ....
Asynch logic can have some appeal.
i remember the Amulet project, years ago.

however, it's not enough.

- In FC0, everything is designed to be PREDICTABLE.
asynch gates are not predictable.
- asynch logic is not easy to prototype, test,
develop, verify... All the steps in the design and
manufacture of ICs ARE SYNCHRONOUS.
synch logic has some drawbacks but they are very
well understood and integrated in design tools.
asynch gates are not.
- Usually when someone asks "how fast will this run ?",
we can say "well, not as fast as the latest P4" ...
With asynch, we can't even say how slow.

There are other reasons and considerations,
but i don't have time to go back to 1998 and
dust off the discussions that happened then.

And of course, there is the other answer :
if one wants to turn FC0 into async logic,
well, it's up to him to do the work.
This project is already such a nightmare to manage,
even when the mailing list is quiet.

Often, people ask "why isn't F-CPU using this or that cool technology ???",
with s/this/quantic/, s/that/ECL/ , whatever....
They miss the point : the goal is to be FREE,
not to lose time with laboratory-only, science-fiction technology.
The best way to implement FC0 successfully is to use
proven, very well understood and easy to use methodologies
and techniques. Today, synchronous CMOS is the king,
so it's very easy to integrate in the existing industry without
driving the costs up the Himalaya...
Maybe in 10 years, F-CPU will have matured and gained momentum.
before that, there's still enormous work to do with
"old techno that already work".

YG

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