[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [f-cpu] accelerator

To: f-cpu@seul.org
Subject: Re: [f-cpu] accelerator
From: Yann Guidon <whygee@f-cpu.org>
Date: Tue, 14 May 2002 20:12:39 +0200
Delivered-To: archiver@seul.org
Delivered-To: f-cpu-outgoing@seul.org
Delivered-To: f-cpu@seul.org
Delivery-Date: Tue, 14 May 2002 14:06:03 -0400
Organization: http://www.f-cpu.org
References: <Pine.LNX.4.44.0205141308500.24950-100000@moria>
Reply-To: f-cpu@seul.org
Sender: owner-f-cpu@seul.org

hello,

Graham Seaman wrote:
http://www10.edatoolscafe.com/nbc/articles/view_article.php?section=CorpNews&articleid=30886
> Anyone know how this works? Does it compile bits of a design to FPGA and
> read back the results to merge with the software simulation?

i have downloaded what i could get and i'll have to read it.
This can be interesting (or not), and my experience at Mentor could
prove useful :-)

> Graham
WHYGEE
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/

References:
- [f-cpu] accelerator
  - From: Graham Seaman <graham@seul.org>

Prev by Date: [f-cpu] accelerator
Next by Date: Re: [f-cpu] accelerator
Prev by thread: [f-cpu] accelerator
Next by thread: Re: [f-cpu] accelerator
Index(es):
- Date
- Thread