[f-cpu] today's idea : JTAG console !

[whygee@club-internet.fr]

hi !

are there some IC test specialists in this list ?
how many people have used and programmed tools
for the JTAG interface ?

This synchronous interface uses a few wires and
it's a wide-spread IEEE standard that is used to
test PCB traces, IC internal units, program and check
FPGAs, configure systems... There is a relatively good
article about this in Elektor (available now in France)
and there are many resources about this on the Net.

Today's idea is to add an architecture-specific
(shift) register that can be used to communicate
with the core itself, without any need for serial
RS232 ports etc. This JTAG register is split in
2 parts, one for writing and another for reading,
so the host (whatever type) can send bytes to the
CPU and the CPU can answer. Some kind of protocol
must be defined (a flag must be used to specify
if the last byte has been "consumed" or "read" by
the target) but it will remain very simple.

A more sophisticated SW layer can be made on this,
allowing very simple debugging and development,
either emulated, simulated or in HW, with very few
efforts. Because it only needs 2 SRs and a few wires
that are used for testing only, it requires very few HW
resources and it is compatible with most existing test
devices.

I have already used (a bit) JTAG at the university
but i don't trust their programs (which i believe
to break most standards and good taste). So i would like
to ask the listees whether they have used or programmed
GPL'd code for JTAG ?

Is somebody wanting to be responsible for the design of
this unit and of the JTAG interface ?

YG
(sorry if this post is a bit messy)

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