Re: gEDA-user: OT: Opencores CORDIC - bugs?

[Darrell Harmon <dlharmon@xxxxxxxxxxxx>]

On Sat, Mar 10, 2007 at 04:14:19AM +0000, Peter Clifton wrote:
> Does anyone per chance know an efficient hardware algorithm which can
> produce the same /2 results for +ve and -ve twos complement numbers?
> 
> Depending on which stage in the cordic pipeline, the shift may be up to
> one less than a whole word length. I've no idea how this ends up being
> synthesised in an FPGA.
> 
> My current work around is to test for negativity, take the -ve if it is
> -ve, (giving a +ve), do the shift, then take the -ve again (if the
> original was -ve).
> 
> Perhaps the best way is for me to keep the cordic operating in the
> 0<->45 degree angle range, rather than the -45<->45 I've been using so
> far.
> 
> Any thoughts?
> 
> 
> -- 
> Peter Clifton

I have written my own CORDIC rotator in Verilog, and accepted the
different results with positive and negative numbers. It does create
some distortion, but it is minimal. I am using mine as a mixer in 
a digital down converter at 125 MS/s, and am getting, -120 dBFS
distortion with 20 bit data and phase and 16 rotate stages.
Carrying more bit than needed helps greatly with the distortion
since is is mostly due to roundoff.

How fast does this need to run? Your workaround will add a very large
propagation delay (and more gates). You may need additional pipeline
stages. 

I assume you are just wanting cosine? If so, your last idea should
work nicely with minimal additional gates.

-- 
Darrell Harmon
http://dlharmon.com


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