Re: [f-cpu] RC5, F-CPU and srotl

[Michael Riepe <michael@stud.uni-hannover.de>]

On Tue, Apr 09, 2002 at 12:52:16AM +0200, Cedric BAIL wrote:

> > Depends on your definitions of `really' and `simd' ;)
> I think that you have understand what I mean.

Didn't you see the smiley?

> > Here's a 16-bit version, using slightly less than 3 instructions per
> > slice, and only 2 registers:
> > [...]
> Well, we lost what %2 and %1 contain after the call. I know in my call too,
> but it can be a problem.

You can use more registers if you want.

> > > 	An other thing about the srotl, it currently double the asm code.
> > > It mean that, if we have a real srotl operation, we will have the same or 
> > > better performance than the K7 core (who is actually the best for this
> > > algorithm). So my question is what is the cost of having a real srotl
> > > instruction ?
> > A more complex shifter unit, with more delay.
> It was what I was thinking, but is it so important ?

If you don't mind that shift operations take more than 1 cycle...

[...]
> So, we need to patch the manual.

In many places. I made a long list of ambiguities and errors months
ago (e.g. look for the phrase "Dark and Dusty Corners", September 2001).

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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