Re: [f-cpu] Interim solution to prototype the core

[Nikolay Dimitrov <picmaster@xxxxxxx>]

Hi Yann,

On 04/10/2015 03:01 PM, whygee@xxxxxxxxx wrote:
> Sorry for the delay...
>
> I just noticed this awesome new kit :
> http://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/smartfusion2/smartfusion2-starter-kit
>
>
> This is pretty close to the kind of "guest modules" intended for the
>  F-GPU system ! Ideally, a M2S050T is preferred because the M2S010T
> has less gates and, more importantly, less internal RAM blocks (F-CPU
> is very memory hungry !). The board contains only one LPDDR bus, the
> M2S050T could use two to double the bandwidth but this problem is
> already half solved. Using one is already complex enough ;-) When the
> VHDL code works on the kit, someone might be able to design and build
> a PCB with several BGA chips to provide much more memory and
> bandwidth...
>
> What do you guys think ?

Well, I'm not an expert on Actel toys, but this one seems nice (hehe,
it's hard to believe this words are coming from a Xilinx-guy :D). I just
have some practical questions:

1. Is this chip supported by a free version of the Actel tools?

2. Is there a Linux version of these tools?

3. Is it possible to instantiate and use the DDR controller with plain
Verilog/VHDL, without any proprietary stuff (code generators, encrypted
netlists, etc)?

4. Does it have something like DLL/PLL, in order to create all needed
internal clocks from the 12 MHz reference clock?

Regards,
Nikolay
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