Re: [f-cpu] Register Bank

[Juergen Goeritz <goeritz@oekomm.de>]

On Fri, 3 Aug 2001, Ben Franchuk wrote:

> Juergen Goeritz wrote:
> > 
> > On Fri, 3 Aug 2001, Ben Franchuk wrote:
> > 
> > > Juergen Goeritz wrote:
> > > > Depends on how long you can wait after reset. Some registers,
> > > > e.g. of the internal pipeline statemachines have to be reset
> > > > anyway. If you use 256 registers in some inplementation you
> > > > would wait 256 clocks before the built-in selftest r
> > > outines
> > > > can start or you make the reset a part of these. :-)
> > > Reset pulse is over kill often on length like 1/100 of second.
> > > You may want to have two resets -- hard reset like power on.
> > > and warm reset like ctl Alt Del.
> > 
> > There is no warm reset in hardware! That's just software type.
> >
> 
> A warm reset would be similar to a non-mask-able reset.
> Ben.

Non maskable interrupt! Definitely not a reset. At least
I don't know of any processor having two resets :-)
The NMI usually is used for very high speed reaction on
external events that must be reacted on. Therefore it is
not maskable. But it's just another interrupt still.

JG

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