RE: [f-cpu] Re: Floating-Point?

[Kim Enkovaara <kenkovaa@cc.hut.fi>]

On Fri, 17 Aug 2001, Ekkehard Morgenstern wrote:

> Whether execution speed suffers from 128 bits, is a question of
> FPU design, I think.

128 bits is quite wide bus even with current ASIC processes. It is near
the limit where the busses have to be layouted manually and even with
manual layout there can be problems. Also adders with even 64-bit width
are quite complex and have many levels of logic.

But I think the biggest problem is the FPGA implementation. FPGA
structures don't like wide busses and wide muxes. Current high end FPGAs
have some structures to help these problems but even they have problems
with wide busses.

=============================================================================
Mr. Kim Enkovaara   | kim.enkovaara@iki.fi | Microelectronic Riemannian
Vasamatie 1 C 16    | IRC: embo            | curved-space fault in
02630 Espoo         |                      | write-only file system

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