(m) Re: [f-cpu] More Instruction Set Trouble

[Yann Guidon <whygee@f-cpu.org>]

hi,

Michael Riepe wrote:
> On Tue, Aug 21, 2001 at 10:18:32AM +0200, Yann Guidon wrote:
> [...]
> > my personal point of view is to simply add a new "flavour" of the
> > loadaddr instruction, which doesn't use the PC, that's all.
> *nod*
> 
> > The current form of LOADADDR looks like this : (from the manual)
> >
> > LOAD a relative ADDRess to a register
> >  loadaddr r2, r1
> >  loadaddrd r2, r1
> > r1 = PC + 4 + r2, check the result in the D/I TLB and eventually prefetch the data.
> >
> > If you add a new opcode which says that we don't use PC but r3
> > (it's fairly straight-forward),  we're done. no curious scheduling,
> > nothing to change, the necessary HW doesn't change and we must simply
> > update the manual and the instruction encoders/decoders.
> 
> What about this:
>         loadaddrb       r3, r2, r1      # r1 = r2 + r3 (code address)
>         loadaddrbd      r3, r2, r1      # r1 = r2 + r3 (data address)
>         loadaddrbi      simm8, r2, r1   # r1 = r2 + simm8 (code address)
>         loadaddrbid     simm8, r2, r1   # r1 = r2 + simm8 (data address)

my first remark is : several opcodes are too much verbose and lengthy.
some of my propositions are : "move" -> "cp" (it's very explicit for linuxers :-D)
"loadaddr" -> "lai", "lad"
i can see 3 forms : one with PC, one with a register, and one with imm8.
the BISON syntax is not complex then.

> (`-b' means `based (on register r2)').  Unfortunately, the encoding has
> to be different (3 operands instead of 2), so there's not enough room
> for a 16-bit immediate operand (the maximum is 32-8-2*6-1 = 11 bits).
> Otherwise, the original `loadaddr' instruction could be made a special
> case of this one (e.g. when r2=0, use PC+4 instead).

i have the feeling (beware !) that we can attempt to do an exception.
i presume that this instruction will be used more often than i thought,
depending on the compiler quality etc...

we can maybe try to make an "extended" form with (r1+1) as a destination.
opcode : 8 bits
I/D flag : 1 bit
sign : 1
imm16 : 16
src/dest+1 : 6 bits
  total : 32 bits.

it's tight but it's worth.

>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
WHYGEE
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