Re: (m) Re: [f-cpu] More Instruction Set Trouble

[Michael Riepe <michael@stud.uni-hannover.de>]

On Tue, Aug 21, 2001 at 10:18:32AM +0200, Yann Guidon wrote:
[...]
> my personal point of view is to simply add a new "flavour" of the
> loadaddr instruction, which doesn't use the PC, that's all.

*nod*

> The current form of LOADADDR looks like this : (from the manual)
> 
> LOAD a relative ADDRess to a register
>  loadaddr r2, r1
>  loadaddrd r2, r1
> r1 = PC + 4 + r2, check the result in the D/I TLB and eventually prefetch the data.
> 
> If you add a new opcode which says that we don't use PC but r3
> (it's fairly straight-forward),  we're done. no curious scheduling,
> nothing to change, the necessary HW doesn't change and we must simply
> update the manual and the instruction encoders/decoders.

What about this:

	loadaddrb	r3, r2, r1	# r1 = r2 + r3 (code address)
	loadaddrbd	r3, r2, r1	# r1 = r2 + r3 (data address)
	loadaddrbi	simm8, r2, r1	# r1 = r2 + simm8 (code address)
	loadaddrbid	simm8, r2, r1	# r1 = r2 + simm8 (data address)

(`-b' means `based (on register r2)').  Unfortunately, the encoding has
to be different (3 operands instead of 2), so there's not enough room
for a 16-bit immediate operand (the maximum is 32-8-2*6-1 = 11 bits).
Otherwise, the original `loadaddr' instruction could be made a special
case of this one (e.g. when r2=0, use PC+4 instead).

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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