Re: [f-cpu] condition checking and register atribote cache

[Michael Riepe <michael@stud.uni-hannover.de>]

On Thu, Aug 01, 2002 at 05:32:45AM -0700, jaap stolk wrote:
> hi,
> 
> im trying to add conditional instructions to
> fcpusim, and have some ideas:
> 
> according to the manual there will be "cache" copy
> of the flags, because reading a register is
> rather "slow".

The scoreboard, yes.

> what i would like to do is use the x-bar read-bus
> instead. this is possible, because the condition
> register is read onto the x-bar (but not passed on to
> any EU)

That may be too slow. If you have a zero condition, you'll have to OR all
bits of the condition register - which will take some time (approximately
0.5 cycles).

> if the condition is false, we can simply disable the
> clock signal that clocks the data and control
> signals from the x-bar onto the EU's
> (just like if there is a stall)

If the condition signal becomes available during the Xbar cycle, you
can use the `enable' input of the EU. If it comes later, you'll have
to issue the instruction speculatively, and discard the result.

> and disable the clock signal that clocks the port
> numbers into the x-bar write queue.
> (just like if there is a stall)

That's not a problem because it happens several cycles later.

> this will automatically fix the bypassing problem in
> situations like these:
> 
> move    r2,r3
> nop
> move r3,r4,r5 ( if (r3) r5-r4; )

A compiler that generates this kind of code should be taken out and
shot. You can use r2 as the condition register!

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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