Rep:Re: [f-cpu] Manual 0.2.6

["Nicolas Boulay" <nicolas.boulay@ifrance.com>]

-----Message d'origine-----
De: Michael Riepe <michael@stud.uni-hannover.de>
A: f-cpu@seul.org
Date: 02/08/02
Objet: Re: [f-cpu] Manual 0.2.6

On Fri, Aug 02, 2002 at 01:35:31AM +0200, nico wrote:
[...]
> > If we're going to implement a `monster shift' anyway, I suggest a
`chunk
> > shift' instruction that operates on full-size registers (that is,
there
> > will be no SIMD mode) and always shifts 64-bit quantities:
> > 
> >         cshiftl r3, r2, r1      // r1 = r2 << (64 * r3)
> >         cshiftr r3, r2, r1      // r1 = r2 >> (64 * r3)
> > 
> > This can probably be integrated with the SHL execution unit.
> 
> Why not using the SIMD flag ? And do :
>  r1 = r2 << ([8|16|32|64]*r3)

Too complicated.

>>> From hardware point of view ? You need in fact 4 shifters. I beleive
such shifter are smaller than a true 64 bits one.
Maybe the 16 bits version could be implemented (sizeof the loadcons).

>>> What's think software guys ? Is this instruction usefull ? I
personnaly think yes. We can shuffle easly the vector and increase the
use of SIMD.

nicO

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/

 
______________________________________________________________________________
ifrance.com, l'email gratuit le plus complet de l'Internet !
vos emails depuis un navigateur, en POP3, sur Minitel, sur le WAP...
http://www.ifrance.com/_reloc/email.emailif


*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/