[f-cpu] Conditionnal load and store, the return

[cedric <cedric.bail@free.fr>]

Hi,

	I have reread the discussion about conditionnal load and store, and I think 
that we forgot something : exception. In fact when we do a load or a store 
and check the condition only on write. The problem is what append if page 
fault occur ? I think we must clarify that.
	From my point of view I think that we must do the test before starting any 
memory operation, so a trap only occur if the test is true. We must do the 
same if we have a conditionnal prefetch. It's for me the only way to 
correctly execute the 2 branch of a if simultaneously.

	Finally what did we do with the cachemm instruction ? Did we remove or change 
this strange instruction ?

Cedric
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