Re: [f-cpu] signed cmpl

[Michael Riepe <michael@stud.uni-hannover.de>]

On Fri, Dec 20, 2002 at 03:33:56PM +0000, Nicolas Boulay wrote:

> Now it exist an instruction format using 8 bits immediats by stolen 2
> bits in the flag field of the instruction word. I don't like it because
> it stole those 2 bits, so not every reg-reg->reg instructions could use
> 8 bits immediat. 6 bits will do it. So what is the number of
> instructions using immediat between -32 and 32 and that can't use the 8
> bits immediat version of each instruction because it miss those 2 flag
> bits.

The 6-bit approach may be cleaner, but it also makes programming harder.
If you use loadi/storei, for example, you won't get far with only 6 bits.
Or if you deal with characters a lot. Do you really want to waste two
cycles and a register every time you need a character value >= 0x40?

There is also the opposite way: never use those two bits in instructions
that have only register operands - assign additional opcodes instead,
if necessary.

On the other hand, there are instructions which could easily share an
opcode - e.g. inc, dec, neg, abs and nabs. They belong to the same EU,
always use two register operands, and have plenty of room (9 unused
flags).

Before I agree with 6-bit immediates, I want to see detailed usage
statistics, not just guesses. Compile a lot of stuff, including glibc, all
the GNU tools, X11, a JVM and some benchmarks (preferably SPEC CPU2000),
and gather statistics about immediate operand sizes. After that, we can
talk again.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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