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Re: [f-cpu] back to VHDL
On Sun, Feb 10, 2002 at 05:30:12PM +0100, Yann Guidon wrote:
[...]
> by "align", i mean : we get a N-bit word from memory
> but when we request a smaller chunk (a byte, for example),
> it needs to be "aligned" so the requested data appears
> on the LSB, whether or not the address is aligned on N bits.
That will only work in a load instruction, not in a store. On the other
hand, if we have the hardware to do byte stores (that is, select lines for
every single byte and so on), we can use it for byte loads as well.
> I have no intention to provide "unaligned" access
> (when a word of 2^N bits has a pointer with the N LSB not cleared)
> because what would happen if the word crosses a page boundary ?...
*boom* Yes, I know.
> > We should duplicate the byterev part and add it to the LSU (for
> > loade/storee), but the rest is IMHO overkill.
> if byterev is already done in one unit, we could spare the duplication...
We could also move the bytewise stuff (byterev, mix, expand and sdup)
out of the SHL unit. That will make the bitwise operations faster (they're
more timing-critical anyway) because the output mux can become smaller.
> > In general, data should be properly aligned. Applications that violate
> > this rule are supposed to do their bit fiddling on their own.
> of course, but what happens if we request one byte, half-word or word
> from a 64-bit word ? this is where the SHL can help. Maybe i was not
> specific enough...
But using the bit-shifter would be overkill. And it would slow down the
SHL -- we need an additional input mux if we want to use it for both
`sub-word' loads and generic shift operations. And it doesn't help
with sub-word stores at all.
--
Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
"All I wanna do is have a little fun before I die"
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