Re: [f-cpu] back to VHDL

[Juergen Goeritz <goeritz@oekomm.de>]

On Mon, 11 Feb 2002, Yann Guidon wrote:

> > > I have no intention to provide "unaligned" access
> > > (when a word of 2^N bits has a pointer with the N LSB not cleared)
> > > because what would happen if the word crosses a page boundary ?...
> > 
> > *boom* Yes, I know.
> 
> Jo gojl, hä hä hä ...

Hope you don't bring that restriction to the rest of the system.
When DMA devices also come with that restriction it may be hard
to implement some applications in speed mode without heavy use
of memcpy() which may egalize the gain completely ;-)

Beside multiplexer complexity I see no problem to allow an
unaligned access within a cache line. Problems only occur
when you cross the border of the cache line.

JG

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