Re: [f-cpu] back to VHDL

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Feb 11, 2002 at 08:54:07AM +0100, Juergen Goeritz wrote:
> On Mon, 11 Feb 2002, Yann Guidon wrote:
> 
> > > > I have no intention to provide "unaligned" access
> > > > (when a word of 2^N bits has a pointer with the N LSB not cleared)
> > > > because what would happen if the word crosses a page boundary ?...
> > > 
> > > *boom* Yes, I know.
> > 
> > Jo gojl, hä hä hä ...
> 
> Hope you don't bring that restriction to the rest of the system.
> When DMA devices also come with that restriction it may be hard
> to implement some applications in speed mode without heavy use
> of memcpy() which may egalize the gain completely ;-)

DMA doesn't use the paging mechanism of the CPU. That's why it's
called *direct* memory access ;)

> Beside multiplexer complexity I see no problem to allow an
> unaligned access within a cache line. Problems only occur
> when you cross the border of the cache line.

That's exactly where things become complicated. And slow.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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